Mike and Steve hooded the newly minted Dr. Venkatesh and Dr. Sampson at the UCSD graduation ceremory today. It was great fun all around with plenty of pomp and circumstance.
We are also happy (and a little sad) to congratulate Ganesh Venkatesh on landing a job in Intel's exciting UHPC group where he will work on low-power, high-performance processors.
Jack will continue in his current capacity as post doc in our group
Best of luck, Ganesh! Keep in touch!
Our IEEE Micro article has been highlighted in the latest issue of the Computing Now newsletter. Access the full article using the link below, or click here.
Our paper describing SDP-ICERs has been accepted to FPL 2011. SDP-ICERs are an implementation of selective de-pipelined c-cores for FPGA softcore processors. SDP-ICERs can reduce energy delay product by 34.8x for the code they target and 25.9x for whole applications.
Ganesh successfully defended his thesis today. In addition to an excellent talk, we marked the occasion with some champaign, some ice cream and sharing of slighly embarassing stories about him.
Ganesh will be joining Intel in Hillsboro working on low-power, high-performance computing.
Well done!
We set an all-time record for web traffic today as work on specialized processor for Android applications made slashdot. It's exciting to see our work getting such wide attention.
The article, "App-Specific Processors to Fight Dark Silicon," describes the dark silicon problem and our effort to combat it with conservation cores and, more specifically, our GreenDroid prototype.
Our group has just published an article in IEEE Micro, titled "The GreenDroid Mobile Application Processor: An Architecture for Silicon's Dark Future." The article describes our efforts to improve smartphone processor efficiency by building conservation cores for Android workloads.
Prof. Michael Taylor gave an invited talk today at the 2011 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES), in Chicago, IL. His talk was titled "Conservation Cores: Energy-Saving Coprocessors for Nasty Real-World Code". You can download the slides here.
We have a new article about GreenDroid in IEEE Communications Magazine. The article is titled "GreenDroid: Exploring the Next Evolution in Smartphone Application Processors". It will appear in the April 2011 issue, but you can read the full text here.
Nathan Goulding-Hotta and Manish Arora have been named finalists in the 2011 Qualcomm Innovation Fellowship program. Their proposal is titled "Understanding the Scalability of Coprocessor-Based Architectures for Irregular Code". They will present their work at one of three finals sessions, on April 26. Eight winning teams will receive $100,000!
Our paper describing Irregular Code Energy Reducers (ICERs) has been accepted to FCCM 2011. ICERs are an implementation of c-cores for FPGA softcore processors. ICERs can reduce energy consumption by up to 9.5x for the code they target and 2.8x for whole applications.
After taking in some of the sites around San Antonio with the rest of the GreenDroid crew (a bunch of other architects from UCSD), Jack delivered an excellent talk detailing our work on caching and pipelining schemes to increase the efficiency and performance of coprocessors for irregular code.
We were also on hand to see Leo Porter receive the award for best student presentation and for the pyrprof group to snag the best poster award at PPoPP. Rock on!
It's a big week for UCSD's architecture group. We have four papers and one poster being presented at three top conferences this week (ACM SIGPLAN, HPCA, and FAST). The papers (listed below) show off the breadth and depth of research we do at UCSD.
- Data-Triggered Threads: Eliminating Redundant Computation, Hung-Wei Tseng and Dean M. Tullsen, In the 17th International Symposium on High Performance Computer Architecture (HPCA), February, 2011.
- Fast Thread Migration via Cache Working Set Prediction, Jeffery A. Brown, Leo Porter, and Dean M. Tullsen, In the 17th International Symposium on High Performance Computer Architecture (HPCA), February, 2011.
- Efficient Complex Operators for Irregular Codes, Jack Sampson, Ganesh Venkatesh, Nathan Goulding, Saturnino Garcia, Steven Swanson, and Michael Bedford Taylor, In the 17th International Symposium on High Performance Computer Architecture (HPCA), February, 2011.
- Reliably Erasing Data from Flash-Based Solid State Drives, Michael Wei, Laura M. Grupp, Frederick E. Spada, and Steven Swanson, In the 9th USENIX Conference on File and Storage Technologies (FAST), 2011.
- Kremlin: Like gprof, but for Parallelization, Donghwan Jeon, Saturnino Garcia, Chris Louie, Sravanthi Kota Venkata and Michael Bedford Taylor, Poster in PPoPP, 2011.
Way to go everyone!
Vikram Bhatt has applied clock gating to conservation cores, cutting dynamic power consumption by 3x!
Our paper describing Cachelets and Selective De-Pipelining, two new techniques for improving performance and reducing power in conservation cores, has been accepted to HPCA 2011. We show how these two techniques can be combined to create fat operators featuring over 100 sub-operations and over a dozen memory ops. Conservation cores constructed from these fat operators, on average, reduce EDP by 2× and area by 35% relative to prior work on conservation cores. ECOcores are up to 2.5x faster than a general-purpose processor and reduce energy consumption by up to 7x for a variety of irregular applications including several SPECINT benchmarks.
We are very happy to welcome Manish Arora and Siddhartha Nath to the GreenDroid team. They are all starting graduate school this year, so a combination of "Welcome" and "Good luck!" are in order.
Nathan's talk generated an exciting amount of press coverage. GreenDroid is creating quite a stir! Read about it at the links below.
Update: 7 September 2010: Some more
- San Diego Union Tribune UCSD: New technology will extend smartphone battery life
- TG Daily 'Dark silicon' improves Android battery life
Update:1 September 2010: More coverage
- Inhabitat "Dark Silicon" Could Boost Smartphone Battery Life 11 X
- e! Science News Computer scientists leverage dark silicon to improve smartphone battery life
- R&D Magazine GreenDroid chip uses dark silicon to improve smartphone battery life
- Jacobs School of Engineering Computer Scientists Leverage Dark Silicon to Improve Smartphone Battery Life
- Machines Like Us Researchers work to improve smartphone battery life
- Science Codex Computer scientists leverage dark silicon to improve smartphone battery life
- Physorg 'Dark silicon' to improve smartphone battery life
- EETimes Asia UCSD researchers develop efficient app-specific cores
First round
- Embedded Insights' take on GreenDroid: UCSD Turns On the Light on Dark Silicon.
- Light Reading discusses GreenDroid: Chip Design Fights Smartphone Power Limits.
- GreenDroid coverage in EETimes: Android processor shines light on dark silicon.
- GreenDroid in IEEE Spectrum: GreenDroid Application Processor Will Battle Dark Silicon.
- GreenDroid will be at Hot Chips: CPU, GPU makers gussie up their wares for Hot Chips.
Today Nathan presented GreenDroid at Hot Chips 22 in Palo Alto, CA. GreenDroid uses conservation cores, or c-cores, to reduce the energy of computation hotspots in Android smartphones. Our group has shown that c-cores can deliver up to 18x better energy efficiency than a general purpose processor, without sacrificing performance.
GreenDroid was the only presentation from an academic institution this year. See the full slides below.
The advance schedule for Hot Chips 22 is now available. Our GreenDroid presentation will be on the first day of the conference, August 23, 2010. See link below.
We will present the GreenDroid mobile application processor at Hot Chips 22 this August, on the Stanford University campus in Palo Alto. Hot Chips is one of the leading conferences on high-performance microprocessors.
Jack presented our c-cores work at ASPLOS. The talk was well received, and generated a number of interesting discussions. With the talk out of the way, we had time to enjoy several of Pittsburgh's attractions, including slaw and fry-laden Primanti Brothers sandwiches. Also, slides are now available.
The final version of our paper "Conservation Cores: Reducing the Energy of Mature Computations" is now available online.
Conservation cores, or c-cores, are specialized processors that focus on reducing energy and energy-delay instead of increasing performance. This focus on energy makes c-cores an excellent match for many applications that would be poor candidates for hardware acceleration (e.g., irregular integer codes). We present a toolchain for automatically synthesizing c-cores from application source code and demonstrate that they can significantly reduce energy and energy-delay for a wide range of applications. The c-cores support patching, a form of targeted reconfigurability, that allows them to adapt to new versions of the software they target. Our results show that conservation cores can reduce energy consumption by up to 16.0× for functions and by up to 2.1× for whole applications, while patching can extend the useful lifetime of individual c-cores to match that of conventional processors.
Our paper describing our approach to reducing application energy through the use of automatically-generated application-specific hardware, called conservation cores, has been accepted for publication at ASPLOS 2010.
